1. Field of Invention
This invention relates to a patterning method for a target layer.
2. Description of Related Art
In manufacture of integrated circuit, photolithography processes are performed to transfer patterns from photomasks having customized circuit patterns thereon to thin films formed on a wafer. A patterning process comprises forming a photoresist layer on a target layer, exposing the photoresist layer by a photomask having customized circuit patterns thereon, developing the photoresist layer and etching the target layer using the patterned photoresist layer as a mask. For a typical IC product manufacturing process, such patterning process is performed several times to transfer circuit patterns to some layers.
Conventionally, to increase the integration degree of devices without being limited by the resolution of the optical tool, a double patterning process is developed. In a double patterning process, a mask layer is formed on the target layer and patterned twice using different photomasks. In other words, the steps of photoresist coating, exposure, development and etching are repeatedly in sequence to transfer two different groups of patterns to the mask layer. Thus, the patterns of the patterned mask layer have a smaller line width than that of the patterns on any of the photomasks. Then, the target layer is patterned using the patterned mask layer as a mask, so as to transfer the patterns of the patterned mask layer to the target layer. In this way, a device formed from the target layer has a reduced line width.
However, since the procedure of the conventional double patterning process is complex, the cycle time and cost of the IC manufacturing process are increased.